OPERATIONAL CIRCUIT FOR FINITE BODY

• Main Authors: MURASE KAZUHIRO, MATSUMOTO MICHIHIRO
• Format: Patent
• Language: English
• Published: 30.04.1988
• Subjects: BASIC ELECTRONIC CIRCUITRY; CALCULATING; CODE CONVERSION IN GENERAL; CODING; COMPUTING; COUNTING; DECODING; ELECTRIC DIGITAL DATA PROCESSING; ELECTRICITY; PHYSICS

PURPOSE:To miniaturize the scale of a circuit and to realize a general operation circuit by consisting of a multiplier which executes a multiplication of a first input and a second input expressed in vector and outputs the result in the form expressed in expanded vector and a divider which divides the multiplied results expressed in expanded vector by a primitive polynomial to convert an output expressed in vector. CONSTITUTION:A titled circuit has the multiplier 11 which multiplies (n) bit of the first input expressing the element P of a finite body GF(2) in vector by (n) bit of the second input expressing the element Q of the finite body GF(2) in vector so as to obtain a multiplied result R is (2n-1) bit of output expressed in expanded vector, and also has the divider 12 which sets the output R from the multiplier 11 as the first input and sets the coefficient K of the primitive polynomial as the second input so as to divide the first input R by the second input and converts (2n-1) bit of the first input R expressed in expanded vector into (n) bit of output S expressed in vector. Thus the general arithmetic circuit whose scale is small can be constituted.