TIME DIVISION MULTIPLEXING CIRCUIT

PURPOSE:To attain the efficient operation in matching with the operating state of a connected terminal equipment by providing a means for selectively setting an address of an interface signal processing section and a multiplex signal generating section having a means converting a set address into a...

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Bibliographic Details
Main Authors SANPOU YOSHIAKI, YAGI TOSHIKI, KAWAMURA KUNIMITSU, SATO HIDETO
Format Patent
LanguageEnglish
Published 29.03.1988
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Summary:PURPOSE:To attain the efficient operation in matching with the operating state of a connected terminal equipment by providing a means for selectively setting an address of an interface signal processing section and a multiplex signal generating section having a means converting a set address into a random address signal and generating the signal. CONSTITUTION:The titled circuit consists of plural interface (IF) signal processing sections 111-11n, a multiplex signal geenrating section 21 setting an address to be multiplexed and demultiplexed optionally and outputting a setting address to an address signal line 41, and a multiplex/demultiplex processing section 31 using the address signal of the multiplex signal generating section 21 to apply multiplex/demultiplex processing among I/F signal processing sections 111-11n via a data signal line 51. Thus, a multiplex setting device 211 of the multiplex signal generating section 21 sets the address of the I/S signal processing sections 111-11n to be multiplexed/demultiplexed to switch a multiplex/demultiplex signal optionally. If the signal subject to multiplex differs day and night, the said address is set in advance to switch the address optionally.
Bibliography:Application Number: JP19860214398