PACKET SWITCH

• Main Authors: KATAOKA HIDEKI, HIRAMATSU ATSUSHI, TAKAHASHI TATSURO, YAMANAKA NAOAKI, SAKAKIBARA SO, KIKUCHI SHIRO
• Format: Patent
• Language: English
• Published: 25.03.1988
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; SELECTING

PURPOSE:To maintain a switching network in a large capacity, and also, to execute operation at a high speed by constituting the switching network of simple switches, and also, providing a buffer memory and a speed converting element on input and output lines. CONSTITUTION:In a packet switch for containing (n) pieces of input lines and (m) pieces of output lines, cache memories 601-60n and input data buffers 501-50n are constituted so as to have a capacity which can store plural packets, and a switching network 801 is constituted of simple switches. A packet data on an input data line is stored in the buffers 501-50n, and also, transferred to the memories 601-60n. In such a case, a header having number information of the output line is sent into a controlling circuit 901. The circuit 901 analyzes this information, closes a necessary intersection of a switching network 801 when the output line is unused, and also, sends a packet sending-out instruction to the memories 601-60n. Also, when the output line is being used, it is put off to send out the packet, and it is stored in the memories 601-60n.