DEMODULATION SYSTEM

PURPOSE:To remove noise and to obtain a stable demodulating clock signal by combining a pattern matching circuit, an octal counter, a comparator and an adder. CONSTITUTION:When a reproduction signal (a) is inputted to a pattern matching circuit 1, a pattern matching signal b1 is outputted only when...

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Bibliographic Details
Main Authors IWATANI YASUYUKI, OZAKI MINORU
Format Patent
LanguageEnglish
Published 10.03.1988
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Summary:PURPOSE:To remove noise and to obtain a stable demodulating clock signal by combining a pattern matching circuit, an octal counter, a comparator and an adder. CONSTITUTION:When a reproduction signal (a) is inputted to a pattern matching circuit 1, a pattern matching signal b1 is outputted only when conforming according to a specified pattern matching condition. An octal counter 2 to which the signal b1 is given counts basic clock signals (c) The count value (x) and a predetermined constant is compared by a comparator 3. A specified number corresponding to the result of comparison and the signal b1 are added by an adder 4. The added value (y1) is made the load value of the counter 2. Thereby, the jitter of one clock signal included in the reproduction signal (a) is removed. Thus, the noise is eliminated and a stable demodulating signal can be obtained.
Bibliography:Application Number: JP19860198168