DATA TRANSFER CONTROL SYSTEM

PURPOSE:To quit LSi(I/OLSi) for peripheral device control even during data transfer and to improve processing performance by providing a means which inhibits a data request signal from the LSi and causing a data overrun in the transfer. CONSTITUTION:A data retrieval circuit 6 compares and retrieves...

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Bibliographic Details
Main Authors MUNAKATA SHOSHICHI, KINOSHITA NOBORU
Format Patent
LanguageEnglish
Published 02.11.1988
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Summary:PURPOSE:To quit LSi(I/OLSi) for peripheral device control even during data transfer and to improve processing performance by providing a means which inhibits a data request signal from the LSi and causing a data overrun in the transfer. CONSTITUTION:A data retrieval circuit 6 compares and retrieves comparative retrieval data which is set previously and transferred data and when the result of comparative retrieval is true, the data retrieval circuit 6 informs a microprocessor 1 for control of that through a microprocessor bus 101. The microprocessor 101 for control sets a flip-flop 4 through the microprocessor bus 101 unless the data transfer is finished and sends an output to an AND circuit 5. Consequently, the data requests signal 103 is transmitted to the data retrieval circuit 5 and a data acceptance signal 106 from the data retrieval circuit 6 is transmitted to the I/OLSi3. Consequently, the I/OLSi3 causes a data overrun error and stops operating to finish the operation. Consequently, the processing performance is improved.
Bibliography:Application Number: JP19870099723