FIELD-EFFECT TRANSISTOR

• Main Authors: ONOZAWA TATSUO, KANEKO WAKAHIKO
• Format: Patent
• Language: English
• Published: 25.10.1988
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PURPOSE:To increase the channel current at the same gate bias voltage as in a conventional design by a method wherein an impurity-containing semiconductor layer is provided between an impurity-free semiconductor layer and gate insulating layer. CONSTITUTION:In a field effect transistor of this design, a gate electrode 105, a gate insulating layer 104 in contact with the gate electrode 105, an impurity- containing first semiconductor layer 107 in contact with the gate insulator 104, an impurity-free second semiconductor layer 103, and a source electrode 102 and a drain electrode 101 which are in ohmic contact with the second semiconductor layer 103 and are separated from each other with a gate electrode 105 at the middle. For example, chromium is spattered onto a glass substrate 106 for the patterning of a gate electrode 105. Next, a gate insulating layer 104 is formed, whereon an N<+>-a-Si active layer 107, an j-a-Si layer 103, and an n<+>-a-Si layer 108 are formed, in that order. Further, chromium is applied in a second spattering process, and then patterning is accomplished for a drain electrode 101 and a source electrode 102.