AMPLITUDE DETECTING CIRCUIT

PURPOSE:To obtain a circuit digitized as an envelope detecting circuit, a peak holding circuit, or a bottom holding circuit by providing an A/D converter or the like to convert an input analog signal to a first digital data. CONSTITUTION:When the circuit is used as the bottom envelope detecting circ...

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Bibliographic Details
Main Author SAWADA HISASHI
Format Patent
LanguageEnglish
Published 23.05.1988
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Summary:PURPOSE:To obtain a circuit digitized as an envelope detecting circuit, a peak holding circuit, or a bottom holding circuit by providing an A/D converter or the like to convert an input analog signal to a first digital data. CONSTITUTION:When the circuit is used as the bottom envelope detecting circuit of an input analog signal 1, a comparator 4 outputs the high level if data of an A/D converter 2 is equal to or smaller than data of a register 7, and the comparator 4 outputs the low level if the former is larger than the latter. Consequently, data of the converter 2 is successively outputted and data DOUT is reduced as long as data of the converter 2 is smaller than output data DOUT. If the former is larger than the latter, data DOUT is increased from a digital value corresponding to the bottom value of the signal in accordance with a prescribed increase characteristic. If data of a register 8 is directly supplied to a multiplexer 6, data DOUT is not reduced or increased. That is, a complete peak holding circuit or bottom holding circuit is obtained.
Bibliography:Application Number: JP19860290868