SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PURPOSE:To prevent the occurrence of a through current in a dynamic gate circuit by generating an incorporated clock signal and supplying it to a generating circuit when a fundamental clock signal from an external terminal is stopped. CONSTITUTION:When a fundamental clock signal phi is supplied peri...

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Bibliographic Details
Main Authors OKAMURA TOSHIO, UENO TATSUHIKO, INOUE FUTOSHI, KITAZAWA AKITOSHI, SHINAGAWA YUTAKA
Format Patent
LanguageEnglish
Published 27.03.1987
Subjects
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
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Summary:PURPOSE:To prevent the occurrence of a through current in a dynamic gate circuit by generating an incorporated clock signal and supplying it to a generating circuit when a fundamental clock signal from an external terminal is stopped. CONSTITUTION:When a fundamental clock signal phi is supplied periodically, a stop signal STP generated by a pulse detecting circuit PD is '0', and the signal phi is transmitted to a clock generating circuit of the following stage through a multiplexer MPX to output two-phase clock signals phi1 and phi2. When the signal phi is stopped, the signal STP becomes '1', and the output pulse of an oscillator OSC is transmitted to the clock generating circuit through the multiplexer MPX to generate signals phi1 and phi2. Two-phase clocks phi1 and phi2 are supplied to dynamic gates (Q1-Q12), and an input signal A is outputted through dynamic gates having the shift register function.
Bibliography:Application Number: JP19850206484