SEMICONDUCTOR TESTER

PURPOSE:To obtain an apparatus which is excellent in the versatility while cutting back testing cost, by switching test signals and connecting relations between terminals of a semiconductor device to be tested by a connecting relation specifying program added to a test program. CONSTITUTION:First, t...

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Bibliographic Details
Main Authors MAENO HIDESHI, TADA TETSUO
Format Patent
LanguageEnglish
Published 27.03.1987
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:PURPOSE:To obtain an apparatus which is excellent in the versatility while cutting back testing cost, by switching test signals and connecting relations between terminals of a semiconductor device to be tested by a connecting relation specifying program added to a test program. CONSTITUTION:First, to determine the logical state of memory element FV1-10 and FG1-10 composing a power source system route formation circuit, a shift clock is outputted from a POGO pin 3FC of a tester and a serial data for specifying connecting relations in a power source system is outputted from a POGO pin 3FD to set a data for respective memory elements. Then, for example, when a terminal 1e of a semiconductor device DUT1 is connected to the ground GND within the tester, a data is set to turn a Q output alone of the FV5 among the memory elements FV1-10 to 1 while a data is set to turn a Q output alone of the FG5 to 0 among the memory elements FG1-10. In this manner, the terminal 1e is connected to the ground GND within the tester.
Bibliography:Application Number: JP19850209418