JPS6221143B

PURPOSE:To increase the reliability by providing at least one-bit substituting memory element to n-sets of array card and substituting it with the substitution memory element when the error element is selected. CONSTITUTION:One groups A, B, C consisting of n-sets of array cards providing a plurality...

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Bibliographic Details
Main Authors MUTO HIROSHI, ANDO SABURO
Format Patent
LanguageEnglish
Published 11.05.1987
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PURPOSE:To increase the reliability by providing at least one-bit substituting memory element to n-sets of array card and substituting it with the substitution memory element when the error element is selected. CONSTITUTION:One groups A, B, C consisting of n-sets of array cards providing a plurality of memory elements are provided with at least one bit of substitution memory elements 12, 13, 14. When data is read out from the memory and one bit error is detected, CPU delivers the substitution indication signal 7, error group address 8, and syndrome bit 10. Error group address is stored in the address register 2 from CPU. When the group address designated in readout and the address of the address register 2 are in agreement and the substituting indication signal 7 is produced, the substitution signals 9, 28, 30 are produced, and the array card including the error element is selected from the syndrome of the bit register 3 at the selection circuit 5 to execute the substitution of the substituted memory.
Bibliography:Application Number: JP19790170823