COMPARATOR

PURPOSE:To narrow the width of hysteresis at high speed clock operation by forming a positive feedback loop of a latch circuit through a transistor (TR) for common base in an input signal amplification TR differential amplifier circuit and the latch circuit. CONSTITUTION:Collectors of TRs 10, 11 and...

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Bibliographic Details
Main Authors DEGUCHI TAKUMI, FUNAHASHI MASAHIRO, KUSAMA NOBORU
Format Patent
LanguageEnglish
Published 07.09.1987
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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Summary:PURPOSE:To narrow the width of hysteresis at high speed clock operation by forming a positive feedback loop of a latch circuit through a transistor (TR) for common base in an input signal amplification TR differential amplifier circuit and the latch circuit. CONSTITUTION:Collectors of TRs 10, 11 and 13, 12 in pairs with each other are connected in common in comparison TRs 10, 13 constituting an input signal amplification differential amplifier circuit and latch TRs 11, 12 constituting latch circuit differential amplifier circuit. Further, TRs 18, 19 for common base are provided between each connecting point and collector resistors 40, 41. Further, a signal obtained across the load resistors 40, 41 is returned to the differential pair of the latch TRs 11, 12 to form a positive feedback loop of the latch circuit.
Bibliography:Application Number: JP19860044717