DELAY CIRCUIT

PURPOSE:To change continuously the delay time by providing an integration circuit integrating an input signal, two reference voltage forming circuits, two comparator circuits and a flip-flop inverted alternately and outputting a delay signal in response to the control voltage from the flip-flop. CON...

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Bibliographic Details
Main Author HATAKEYAMA AKIHIRO
Format Patent
LanguageEnglish
Published 10.07.1987
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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Summary:PURPOSE:To change continuously the delay time by providing an integration circuit integrating an input signal, two reference voltage forming circuits, two comparator circuits and a flip-flop inverted alternately and outputting a delay signal in response to the control voltage from the flip-flop. CONSTITUTION:When a pulse input signal Vin with a peak (v) is inputted, the signal Vin is integrated by an integration circuit 11 and converted into a waveform signal Vin'. Comparator circuits 14, 15 compare the integrated input signal Vin' with reference voltage signals Ref1, Ref2. As the result of comparison, signals CP1, CP2 are inputted to an XOR gate 16 and then inputted to a clock input of a flip-flop 17. The flip-flop 17 fetches the comparison result signal CP1 at the trailing of the output signal XOR of the XOR gate 16 and a delay output signal dVin is outputted from a set output (Q). The signal dVin is an input signal Vin delayed by a time dt1 simple corresponding to the control voltage CV(L).
Bibliography:Application Number: JP19850294687