INTER-CENTRAL PROCESSOR COMMUNICATION SYSTEM FOR DUPLEX SYSTEM

PURPOSE:To prevent the evil effects due to the runaway of a central processor at the off-line side by monitoring periodically the discontinuation of working of said central processor through a central processor at the on-line side. CONSTITUTION:A central processor 10 at the on-line side writes the t...

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Bibliographic Details
Main Author TANABE YOSHIICHI
Format Patent
LanguageEnglish
Published 18.04.1986
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:PURPOSE:To prevent the evil effects due to the runaway of a central processor at the off-line side by monitoring periodically the discontinuation of working of said central processor through a central processor at the on-line side. CONSTITUTION:A central processor 10 at the on-line side writes the transfer data on a main memory 21 at the off-line side via a bus 101. Then the start address of a central processor 11 at the off-line side is set and started via a communication signal line 12. A monitor program of the processor 11 is started periodically at the inside of an on-line program, and the report to be given from the processor 11 is waited for. The monitor program of the processor 11 checks the discontinuation of working and then has the same processing again in the next cycle if the working is continued. If the working is stopped, the memory 21 reads the data and the processor 11 reports the end of data transfer.
Bibliography:Application Number: JP19840198970