SEMICONDUCTOR DEVICE

PURPOSE:To improve the reliability of an insulation film mitigating the concentration of electric field at the edge of memory element capacity portion and to obtain a high-tension device by making the interior angle of a groove in a groove type capacitor within a specific range. CONSTITUTION:A groov...

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Bibliographic Details
Main Authors YAMAGUCHI KEN, NISHIMURA REIKO
Format Patent
LanguageEnglish
Published 01.02.1986
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Summary:PURPOSE:To improve the reliability of an insulation film mitigating the concentration of electric field at the edge of memory element capacity portion and to obtain a high-tension device by making the interior angle of a groove in a groove type capacitor within a specific range. CONSTITUTION:A groove of approximate polygon is formed within a semiconductor substrate 1 and when an MIS construction capacitor is made at the side of the groove, the interior angle of the groove is made within the range of 26 deg. or more and 334 deg. or less. For example, a silicon etching mask 14 which has the aperture for the region where the groove is to be formed is formed after a field SiO2 2 and a channel setting layer 13 are formed by LOCOS method and implantation of ion on the P type silicon substrate 1. Then, a V-shape groove is formed by reactive sputter-etching silicon with such a chloride gas as CCl4 and an approximate polygon groove is formed making the upper part vertical by etching conditions. Then, a capacitor insulation film 3 and a plate electrode 4 are formed after the silicon etching mask is removed and an approximate polygon groove type capacitor is formed.
Bibliography:Application Number: JP19840144201