SEMICONDUCTOR IC DEVICE
PURPOSE:To quicken the rise at the time of power turn-ON of a substrate back bias voltage by a method wherein the IC is composed of an osillation circuit, a plurality of charge pump circuits rectifying pulse signals generating there, and a timer circuit controlling the time in such a manner that the...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
08.05.1985
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Subjects | |
Online Access | Get full text |
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Summary: | PURPOSE:To quicken the rise at the time of power turn-ON of a substrate back bias voltage by a method wherein the IC is composed of an osillation circuit, a plurality of charge pump circuits rectifying pulse signals generating there, and a timer circuit controlling the time in such a manner that the substrate back bias voltage vecomes to a fixed value. CONSTITUTION:A positive feedback loop is constructed by connection of a delay circuit DL in parallel with inverter circuits IV1, IV2, and IV3 connected in cascade, which is made as a ring oscillator OSC. Next, its oscillated output signal is passed through an output inverter circuit IV0 and rectified in the first charge pump circuit CP1, and the branched oscillated output signal is inputted to the second charge pump circuit CP2 via NAND gate. Then, a lamp circuit LP is connected between the OSC and the NAND gate and then used as the timer circuit. Here, the circuits CP1 and CP2 are constructed of capacitors and MOSFET's, and the circuit LP are formed of inverters and FET's. |
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Bibliography: | Application Number: JP19830186770 |