MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To connect lower layer wirings and upper layer wirings via wiring substance buried in a through hole and to flatten on the through hole by adding one step for one layer in the photoetching steps. CONSTITUTION:Lower layer wiring system 301, an interlayer substance 302 and a through hole 306 a...

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Bibliographic Details
Main Author MIZUSHIMA KAZUYUKI
Format Patent
LanguageEnglish
Published 06.04.1985
Edition4
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE:To connect lower layer wirings and upper layer wirings via wiring substance buried in a through hole and to flatten on the through hole by adding one step for one layer in the photoetching steps. CONSTITUTION:Lower layer wiring system 301, an interlayer substance 302 and a through hole 306 are formed on a semiconductor substrate 305, a wiring substance 307 is bonded, and a substance 309 which is different in properties from the substance 307 is bonded. Then, with a photoresist 308 as a mask the substance 309 is removed by an isotropic etching method, with the remaining substance 309' as a mask the substance 307 is overetched by an isotropic etching method, and the substance 307' remains in the through hole. The layer 309' is overetched in the form of 309'', with the substance 309'' as a mask the substance 307' is removed by an isotropic etching, and flattened substantially planely with the substance 302. The layer 309'' and the photoresist 308 are removed, an upper layer wiring substance is bonded, the upper layer wiring system 303 is formed by a photoetching method, a protective film 304 is bonded to complete 2-layer wirings.
Bibliography:Application Number: JP19830168683