FIELD-FEEECT TRANSISTOR

• Main Author: SATOU KEIJI
• Format: Patent
• Language: English
• Published: 02.12.1985
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PURPOSE:To operate a field-effect transistor at high speed by forming a second conduction type high impurity-concentration region where holding a buried layer in a surface region in an epitaxial layer in the FET and constituting a source and a drain. CONSTITUTION:A P<+> type buried layer 7 is shaped in a predetermined region in the surface of a P type silicon substrate 1, and an N<-> type epitaxial layer 8 is formed on the whole surface of the P type silicon substrate 1. A P type impurity is diffused in a prescribed region while penetrating the N<-> type epitaxial layer 8 to shape a gate electrode extracting port 9. An N type impurity is diffused at two positions holding said P<+> type buried layer 7 in the surface of the N<-> type epitaxial layer 8 to form N<+> type regions 2 and 3. When a bias is applied gradually while gate voltage is brought to a negative value, a channel is narrowed, and disappears at some bias, and drain currents do not flow. Since the channel is formed in the epitaxial layer in the FET, the high speed of carriers is obtained.