METHOD AND APPARATUS FOR DETECTING WIRING PATTERN ON SUBSTRATE

• Main Authors: HARA YASUHIKO, UJIIE NORIAKI, TSUKAZAKI KOUICHI, ISE AKIRA
• Format: Patent
• Language: English
• Published: 19.07.1985
• Subjects: CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; MEASURING; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS; MEASURING LENGTH, THICKNESS OR SIMILAR LINEARDIMENSIONS; PHYSICS; PRINTED CIRCUITS; TESTING

PURPOSE:To make it possible to also detect a residual copper shortcircuit fault low in light reflectivity without falsely reporting narrow part in a remaining land caused by the shift of a throught-hole as a fault, by using a reflected light detecting system and a fluorescence detecting system in combination and utilizing mutual advantages of both systems. CONSTITUTION:An infrared reflected ray detector 15 and an infrared ray reflecting mirror 17 are provided other than a fluorescence detector 19 and the light image of the fluorescence pattern detected by the fluorescence detector 19 is sent to a first stage contraction circuit 56 and second contraction and enlargement circuits 59, 60 and a fluorescence pattern subjected to first stage contraction is masked by a contraction/ enlargement fluorescence pattern in a masking circuit 62 while the reflected light detection pattern image at the same place as fluorescence detection is masked by the contraction/enlargement fluorescence pattern in a masking circuit 63 and both masked signals are sent to a fault extraction circuit 66 and exclusive logical sum processing is performed to detect a fault. By this method, the detection of a residual copper shortcircuit fault low in light reflectivity and the delamination fault in the upper layer part of a wiring pattern is enabled.