CONTROL SYSTEM FOR STOP BIT LENGTH

PURPOSE:To avoid the ommision of data at the reception side by performing transmission after controlling the time width of a stop bit so that coincidence is obtained between the time width of the output data at the transmission side and that of the data at the reception side. CONSTITUTION:An asynchr...

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Bibliographic Details
Main Authors SAKATA TAKAO, SATOU JIYUNICHI
Format Patent
LanguageEnglish
Published 14.06.1985
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:PURPOSE:To avoid the ommision of data at the reception side by performing transmission after controlling the time width of a stop bit so that coincidence is obtained between the time width of the output data at the transmission side and that of the data at the reception side. CONSTITUTION:An asynchronous communication interface adaptor 14 delivers the input parallel data based on the sampling pulse sent from a pulse generator 18 after converting the data into the serial data having start and stop bits. The sampling pulses equivalent to a data bit by a prescribed number are supplied to a counter 15 which is reset with detection of the start bit of the output data. When the count value of the counter 15 is equal to the value D corresponding to the start bit and the data, a comparator 16 works. As a result, a monostable multivibrator 17 works to change the pulse frequency of the generator 18. Therefore the time width of the stop bit is changed to obtain coincidence between the data time width of the transmission side and that of the reception side.
Bibliography:Application Number: JP19830216588