DEVICE FOR PROCESSING MIMD VARIABLE WORD LENGTH

PURPOSE:To make a jump condition possible by means of hardware, by installing a circuit which discriminates the jump condition from the condition of all processors when the jump condition is zero and from the condition of the highest rank processor when the jump condition is other than zero, to each...

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Bibliographic Details
Main Authors ITOU YUKINOBU, SUZUKI KAORU
Format Patent
LanguageEnglish
Published 06.04.1984
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PURPOSE:To make a jump condition possible by means of hardware, by installing a circuit which discriminates the jump condition from the condition of all processors when the jump condition is zero and from the condition of the highest rank processor when the jump condition is other than zero, to each processor. CONSTITUTION:A signal transmission line US is connected to the signal transmission line DS of the adjacent higher rank unit processor and the transmission line DS is connected to the signal transmission line US of the adjacent lower rank unit processor UP. When the connection to the higher and lower rank unit processors is made in the case of a variable word length, signals NVWLF and VWLF become ''1''. When a jump instruction is given to the condition of status reference, a signal BI becomes ''1''. Each of these signals is generated as flag information at the signal generating circuit of each unit processor and given to a condition discriminating circuit. The result of the condition discriminating circuit is outputted as a condition output CC.
Bibliography:Application Number: JP19820171853