DATA PROCESSOR

PURPOSE:To accelerate the processing of a subordinate controller, by reading a microprogram storing memory by an upper bit of an address designated by a head microinstruction before the subordinate controller receives a start signal from a main controller. CONSTITUTION:An instruction is set to an in...

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Bibliographic Details
Main Authors ISHIKAWA SUKETAKA, OOTSUKI TOORU, YABE HIDEAKI, FUKUDA MASAHARU, OOSHIMA YOSHIO, ARA MARI
Format Patent
LanguageEnglish
Published 17.03.1984
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PURPOSE:To accelerate the processing of a subordinate controller, by reading a microprogram storing memory by an upper bit of an address designated by a head microinstruction before the subordinate controller receives a start signal from a main controller. CONSTITUTION:An instruction is set to an instruction register IR51 of a subordinate controller from a main controller MPU, and a control part CNT64 produces an head address of the routine of a microprogram muPG every time an instruction is set to the IR51. This head address is set to an address register CSAR54. Then 4 words a-d of continuous addresses of a control memory CS52 are read out at a time and delivered to a selector SEL60 by using a part of the CSAR54 where the lower 2 bits are excluded as an access address. The CNT64 delivers a signal S before it receives a start signal 17 from the MPU and has an AND62 with the lower 2 bits of the CSAR54. This AND62 is given to the SEL60, and a head mu instruction B0 is read out to a mu instruction register MIR55. When a signal 17 is applied, the CNT64 delivers a signal S2 and gives it to the SEL60 and then reads out a mu instruction B1 to the MIR55.
Bibliography:Application Number: JP19820158114