REFRESH METHOD OF DYNAMIC RAM

PURPOSE:To attain a refresh method which is free from time-out due to the refesh and does not destruct a dynamic RAM by performing the refresh of the dynamic RAM within a period when a CPU gives an access to an I/O address. CONSTITUTION:When an FDC controller 5 produces a data request signal DRQ, a...

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Bibliographic Details
Main Authors SATOU SEIJI, HASHIMOTO SADAKATSU
Format Patent
LanguageEnglish
Published 13.08.1984
Edition3
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PURPOSE:To attain a refresh method which is free from time-out due to the refesh and does not destruct a dynamic RAM by performing the refresh of the dynamic RAM within a period when a CPU gives an access to an I/O address. CONSTITUTION:When an FDC controller 5 produces a data request signal DRQ, a part of the flip-flop group of an I/O port 10 is set. A CPU fetches the contents of the port 10 via a bus line and based on an IN instruction (an instruction to give an access to I/O space) for example. Then the CPU checks whether the DRQ instruction is set at a high or low level and then designates an access mode to the I/O space. Hereafter the CPU gives an access to the I/O device space and an I/O refresh mode is set to execute the refesh of a dynamic RAM line by line and in the bus cycle of this access period. In an I/O refresh mode no column address access selection signal is delivered, and therefore the data terminal of an RAM4 is opened. Thus no collision is produced to the data which is fed on the data bus of the CPU.
Bibliography:Application Number: JP19830015744