ENCODING SYSTEM WITH REDUCED SIGNAL SPEED

• Main Authors: MURATANI TAKUO, KINUHATA KOUJI, YAMAMOTO HIDEO
• Format: Patent
• Language: English
• Published: 19.03.1983
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; PICTORIAL COMMUNICATION, e.g. TELEVISION

PURPOSE:To perform efficient, low-speed signal transmission by transmitting an output signal from a variable length equalizer at a specified bit rate through a transmitting buffer memory, and performing variable length encoding through a receiving buffer memory at a reception side. CONSTITUTION:An output signal from a variable length equalizer is stored temporarily in a transmitting buffer memory 5 and then sent out successively to a transmission line 7 at a specified bit rate. When the signal in the memory 5 (having L-bit capacity) decreases to L1 bits (L1<L), the transfer of the signal from a temporary memory 2 is stopped. When the amound of the signal in the memory 5 decreases to L2 bits (L2<L) as a result of the stopping of the transfer, this stopping is reset. Thus, an output bit array is held invariably constant through the memory 5. At a reception side, on the other hand, a received signal is applied to and stored in a receiving buffer memory 9 to be sent out to a variable length decoder 10. This signal is decoded into a normal variable length code, which is stored in a temporary memory 11 and also sent out to a VTR12 successively.