MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To connect between a lower layer wiring and an upper layer wiring with a wiring material buried in a through hole, to enhance yield of a wiring system, and moreover to hold the upper part of the through hole flat by a method wherein the PR process is supplemented by one process per one wirin...

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Bibliographic Details
Main Author MIZUSHIMA KAZUYUKI
Format Patent
LanguageEnglish
Published 28.10.1983
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE:To connect between a lower layer wiring and an upper layer wiring with a wiring material buried in a through hole, to enhance yield of a wiring system, and moreover to hold the upper part of the through hole flat by a method wherein the PR process is supplemented by one process per one wiring layer. CONSTITUTION:After a lower layer wiring 201 is formed on a semiconductor substrate 205, an interlayer insulating film 202 is adhered, the interlayer insulating film is etched using a resist 207 as the mask to open a through hole 206. At this time, the wiring material 208 of nearly the same thickness with the film 202 is adhered, and a resist 209 is formed only on the through hole. Then the wiring material 208 is removed leaving the through hole part using the resist 209 as the mask. At this time, isotropic etching is applied for etching of the wiring material 208, and by holding properly the margin of the resist 209 between the through hole opening part, the shape buried the opening part with the wiring material 210 can be formed, and the surface can be flattened.
Bibliography:Application Number: JP19820067781