FIELD-EFFECT TYPE SEMICONDUCTOR DEVICE

PURPOSE:To increase the breaking withstand voltage for the titled semiconductor device by a method wherein a high density layer is formed under the source and drain electrode located on the area excluding an active layer, or an insulating film is interposed between the source and drain electrode and...

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Bibliographic Details
Main Author NEMOTO YASUO
Format Patent
LanguageEnglish
Published 09.07.1983
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Summary:PURPOSE:To increase the breaking withstand voltage for the titled semiconductor device by a method wherein a high density layer is formed under the source and drain electrode located on the area excluding an active layer, or an insulating film is interposed between the source and drain electrode and a semiinsulating substrate. CONSTITUTION:Silicon is selectively injected in the semiinsulating substrate 1 such as CaAs and the like in order to form the part whereon a source and drain region and a gate will be formed and an active layer 2 is formed in rectangular shape. At this time, silicon is injected in high density into the sections 12 and 13 which will be turned to the lead-out wiring for the source P drain located outside the active layer 2. Thus, the density of the electric line of force 11 at the source electrode high density layer 7S located in the active layer 2 and the high density layer 12 located at the part which will be turned to the lead-out wiring of the drain is dispersed and attenuated in the thickness direction of the high density layers 12 and 7S, and the dielectric breakdown of the semiinsulating substrate 1 can be prevented by reducing the electrostatic concentration due to the influence of configuration effect of the high density layer. Then, after an ordinary ion has been implanted, an annealing is performed and a lead-out wiring 15 is formed in the same manner as the lead-out wirings 9 and 14 and the gate electrode 5.
Bibliography:Application Number: JP19810211193