CHIP STRUCTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT

PURPOSE:To prevent a leakage current based on a contact with a bonding wire by forming a P type diffused region at the outer peripheral edge of an integrated circuit chip and disposing a bonding pad at the inside. CONSTITUTION:A P type diffused region 8 is formed across the scribing line of a wafer...

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Bibliographic Details
Main Author IMURA KENICHI
Format Patent
LanguageEnglish
Published 10.06.1982
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Summary:PURPOSE:To prevent a leakage current based on a contact with a bonding wire by forming a P type diffused region at the outer peripheral edge of an integrated circuit chip and disposing a bonding pad at the inside. CONSTITUTION:A P type diffused region 8 is formed across the scribing line of a wafer 12 having an N type diffused region, a bonding pad 9 is disposed at the inside, and a bondig wire 11 is connected between bonding pads 9. Thus, even if the bonding wires 11 are contacted with a P type diffused region 10, a P-N junction diode is formed between the region 10 and the N type diffused region of the substrate 12 and the diode is reversely biased with positive power source system. Accordingly, no leakage current will be produced.
Bibliography:Application Number: JP19800170123