SEMICONDUCTOR MEMORY CELL

PURPOSE:To attain a purpose for making miniaturize a structure by decreasing the number of contacts per cell of a 2T cell. CONSTITUTION:A p-channel MOS transistor is constituted of a p type first electrifying electrode 11 connected to a write line WW', a gate electrode 12, an n type substrate a...

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Bibliographic Details
Main Author SUZUKI SHIYUNICHI
Format Patent
LanguageEnglish
Published 09.12.1982
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Summary:PURPOSE:To attain a purpose for making miniaturize a structure by decreasing the number of contacts per cell of a 2T cell. CONSTITUTION:A p-channel MOS transistor is constituted of a p type first electrifying electrode 11 connected to a write line WW', a gate electrode 12, an n type substrate area 13 to which reference potential is supplied, and a p type second electrifying electrode 16 being in an electrically floating state. Also, an n-channel MOS transistor is constituted of an n type second electrifying electrode 13 to which reference potential is supplied, an n type first electrifying electrode 14 connected to a readout line RR', a gate electrode 15, and a p type substrate area 16 being in an electrically floating state. The n type electrode 13 and the p type electrode 16 are used in common in both MOS transistors. In a 2T cell of this structure, binary information is stored by charging and discharging various capacities formed between the p type electrode 16 and its circumferential electrode.
Bibliography:Application Number: JP19810086208