SERIAL DATA TRANSMISSION CIRCUIT
PROBLEM TO BE SOLVED: To provide a serial data transmission circuit for receiving transmission data, to which a start bit and a stop bit are added, at asynchronous and synchronous serial data reception circuits. SOLUTION: A serial data transmission circuit 1 is composed of a shift clock output part...
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Main Author | |
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Format | Patent |
Language | English |
Published |
12.02.1999
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To provide a serial data transmission circuit for receiving transmission data, to which a start bit and a stop bit are added, at asynchronous and synchronous serial data reception circuits. SOLUTION: A serial data transmission circuit 1 is composed of a shift clock output part 3, shift register 5 and synchronizing clock output part 7. The shift register 5 serially outputs the preset start bit, data, parity bit and stop bit to the outside as transmission data Dout in order. Only when the data and the parity bit are outputted to the outside as the transmission data Dout, the synchronizing clock output part 7 outputs a synchronizing clock synck. |
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Bibliography: | Application Number: JP19970209626 |