MULTI-FAILURE PROCESSING SYSTEM
PROBLEM TO BE SOLVED: To provide a multi-failure processing system for operating priority control according to a failure level related with a multi-failure processing system. SOLUTION: Plural processors 1 share one memory 2 in this system. This system is provided with an outside interruption detecti...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
28.05.1999
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To provide a multi-failure processing system for operating priority control according to a failure level related with a multi-failure processing system. SOLUTION: Plural processors 1 share one memory 2 in this system. This system is provided with an outside interruption detecting means 3 for detecting and storing interruption from the outside part, register 31 for storing an interruption level provided in the outside interruption detecting means 3, logical interruption level storing part 12 for storing a logical interruption level for each program provided in the memory 2, and interruption priority (MCP) flag 11 for storing the state of the MCP provided in the memory 2. |
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Bibliography: | Application Number: JP19970303817 |