NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE

• Main Author: OBATA HIROYUKI
• Format: Patent
• Language: English
• Published: 04.12.1998
• Edition: 6
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

PROBLEM TO BE SOLVED: To avoid writing error even when writing is performed with F-N tunnel mechanism using a very low level write current to assure stable program operation by setting the write voltage as the power supply voltage of a write circuit and then connecting an output of the write circuit to the bit line or Y selector via a transfer gate. SOLUTION: An address is selected in the data read period and the corresponding data is impressed to a data input line 14 to turn on the N-channel MOS transistor N05 and an output of a first inverter 12 is pulled clown to GND. Or, the N-channel MOS transistor N04 turns on and an output of the second inverter 13 is pulled down to GND to set the desired data to each latch. When the write signal PRO becomes high, a transfer gate N06 turns on to connect an output of latch and the bit line BL in order to set each bit line to the desired potential. Thereby, initialization of bit line is no longer required.