COMPONENT ISOLATING METHOD OF SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide an element isolating method of a semiconductor device wherein STI(shallow trench isolation) is used. SOLUTION: A field oxide region of a semiconductor substrate 100 is exposed, a first, a second and a third insulating film patterns 104a, 106a and 108a are formed, and...

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Bibliographic Details
Main Authors HAKU BINSHU, KO SEKICHI, KIM CHANGGYU
Format Patent
LanguageEnglish
Published 13.11.1998
Edition6
Subjects
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Summary:PROBLEM TO BE SOLVED: To provide an element isolating method of a semiconductor device wherein STI(shallow trench isolation) is used. SOLUTION: A field oxide region of a semiconductor substrate 100 is exposed, a first, a second and a third insulating film patterns 104a, 106a and 108a are formed, and a trench 112 is formed on a field region by etching the substrate with a mask. A fourth insulating film 114 which has a protruding part 115 on an active region is formed while burying is performed by a plasma CVD method wherein vapor deposition and etching simultaneously progress. After a mask layer 116 is formed on the fourth insulating film 114, a party of the mask layer 116 of the protruding part 115 and the fourth insulating film 114 are removed, and a mask pattern 116a exposing the fourth insulating film 114 on the active region is formed. By using the mask pattern 116a as a mask, the exposed fourth insulating film 114 is etched, and a fourth insulating film pattern 114a exposing the second insulating film pattern 106a is formed. The mask pattern 116a and the fourth and the first insulating film patterns 114a and 104a are removed.
Bibliography:Application Number: JP19980001022