BUS CONTROL CIRCUIT AND METHOD FOR TESTING THE SAME

PROBLEM TO BE SOLVED: To provide a bus control circuit which can transmit a transmission command SCM with an error by the destination of a test mode, and a method for testing it. SOLUTION: A transmission command SCM including an error is generated by a command generating part 21 of a bus controller...

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Bibliographic Details
Main Authors OKADA KATSUYUKI, YAMAZAKI KOICHI, KATAOKA SHINSUKE, AOKI MICHIHIRO, TAWARA TAMOTSU, IWAMURA KEIJI
Format Patent
LanguageEnglish
Published 13.11.1998
Edition6
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PROBLEM TO BE SOLVED: To provide a bus control circuit which can transmit a transmission command SCM with an error by the destination of a test mode, and a method for testing it. SOLUTION: A transmission command SCM including an error is generated by a command generating part 21 of a bus controller 20A set in a test mode. The transmission command SCM is selected by a selecting part 24, and a transmission frame TF is transmitted from a transmitting part 25 to a data bus 3. The transmission frame TF is received by a receiving part 26 of a bus controller 20B set in a normal mode, and answer data ANS including a detected error code are generated by an answer data generating part 22. The answer data ANS are outputted through a transmission check part 23, selecting part 24, and transmitting part 25 to the data bus 3. A reception command RCM is received by a receiving part 26 of the bus controller 20A, the error code is detected by an answer data generating part 22, and the state of the error detecting function of the bus controller 20B is judged.
Bibliography:Application Number: JP19970112510