SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To prevent write failure of signals even at a high operating frequency (with a short write operation cycle time) in a memory for carrying out high-frequency operation such as a synchronous DRAM. SOLUTION: A sense amplifier driver 104 is constituted by transistors 141, 144 contr...

Full description

Saved in:
Bibliographic Details
Main Author KIKUKAWA HIROHITO
Format Patent
LanguageEnglish
Published 09.10.1998
Edition6
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online AccessGet full text

Cover

More Information
Summary:PROBLEM TO BE SOLVED: To prevent write failure of signals even at a high operating frequency (with a short write operation cycle time) in a memory for carrying out high-frequency operation such as a synchronous DRAM. SOLUTION: A sense amplifier driver 104 is constituted by transistors 141, 144 controlled only by a sense amplifier activation signal 406, and transistors 142, 143 controlled by a write signal 110 and the sense amplifier activation signal 406. At the time of signal read operation, the four transistors become conductive, and at the time of signal write operation, only the two transistors 142, 143 become conductive. Therefore, the sense amplifier driving capability of the sense amplifier driver 104 is lowered at the time of signal write operation in comparison with the time of signal fead operation, and the data latching capability of a sense amplifier 402 is reduced. As a result, data latched by the sense amplifier 402 can be securely rewritten.
Bibliography:Application Number: JP19970073180