SEMICONDUCTOR STORAGE DEVICE AND ITS MANUFACTURE

PROBLEM TO BE SOLVED: To secure insulation between a storage node electrode and bit lines and word lines without forming any void in the interlayer insulating film of a layer underlying a capacitor by forming a height adjusting film having an electrode layer as the overlying layer of a side-wall etc...

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Bibliographic Details
Main Author UMEBAYASHI HIROSHI
Format Patent
LanguageEnglish
Published 26.06.1998
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PROBLEM TO BE SOLVED: To secure insulation between a storage node electrode and bit lines and word lines without forming any void in the interlayer insulating film of a layer underlying a capacitor by forming a height adjusting film having an electrode layer as the overlying layer of a side-wall etching stopper before forming the etching stopper. SOLUTION: Polycide bit lines 32 are provided in a straight direction through a gate electrode 31 and an interlayer insulating film 21 so that the lines 32 can be covered with the insulating film 21. Then an insulating height adjusting film 23 is formed on the insulating film 23 and an electrode layer 33 is formed on the upper surface of the film 23. In addition, a storage node contact MC is formed through the interlayer insulating film 21 between a gate electrode 31 and the bit lines 32, an etching stopper 22, and the height adjusting film 23 and the side wall of the contact MC is coated with a side-wall etching stopper 25. Therefore, the shoulder section EC of the etching stopper 25 is closely connected to the etching stopper 22.
Bibliography:Application Number: JP19960325489