PAD PAIR BIT INFORMATION CARD DEALING WITH

PROBLEM TO BE SOLVED: To inexpensively supply a pad-bit correspondence information card capable of substantially making forgery or illegal use difficult by storing information in a pad pair as two-dimensional coordinates in addition to bit information. SOLUTION: An under pad pattern electrode (under...

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Bibliographic Details
Main Author UEDA SUKENORI
Format Patent
LanguageEnglish
Published 15.05.1998
Edition6
Subjects
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Summary:PROBLEM TO BE SOLVED: To inexpensively supply a pad-bit correspondence information card capable of substantially making forgery or illegal use difficult by storing information in a pad pair as two-dimensional coordinates in addition to bit information. SOLUTION: An under pad pattern electrode (under pad) 2 is molded on the surface of a card substrate 1 by evaporation, sputtering, printing, etc., an insulating layer (resistor layer) 4 is applied to the surface of the electrode 2 so as to leave a detection electrode, an upper pad 3 is molded on a position opposed to the under pad 2 by a similar means and pad-bit correspondence information is stored. Data are recorded by a pad pair and data of which reading is made unnecessary are destructed by an electric or mechanical means to fix a bit state. Namely a circuit for impressing voltage to the pad pair and changing an electric signal is formed, an insulating state is detected and allowed to correspond to a binary number '1' (or '0') and a conductive state is allowed to correspond to '0' (or '1') to operate information.
Bibliography:Application Number: JP19960209397