TIME DIVISION SWITCH
PROBLEM TO BE SOLVED: To improve a component mount efficiency and to extend a highway by applying large scale custom circuit integration to a storage memory control section, a highway multiplexer section, a time memory control section, and a highway demultiplexer section being components of the time...
Saved in:
Main Author | |
---|---|
Format | Patent |
Language | English |
Published |
04.04.1997
|
Edition | 6 |
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | PROBLEM TO BE SOLVED: To improve a component mount efficiency and to extend a highway by applying large scale custom circuit integration to a storage memory control section, a highway multiplexer section, a time memory control section, and a highway demultiplexer section being components of the time division switch. SOLUTION: A highway multiplexer section 40 uses a flip-flop 41 to latch data from plural incoming highways. The data are converted into parallel data by an S/P conversion section 43 and multiplexed by a multiplexer section 44. Path control data written in a storage memory 30 are used for a read address of a time memory 50. The data from the highway multiplexer 40 are given to the time memory 50 via a time memory control section 60 and written in the time memory 50 by an address signal from an address counter 62. Parallel data from the time memory 50 are sent to a PAD 70 based on the data read from the storage memory 30. The data are converted into serial data after level control and the timing is adjusted by a delay circuit 84 and sent from an outgoing highway. |
---|---|
Bibliography: | Application Number: JP19950267830 |