MEMORY DEVICE
PROBLEM TO BE SOLVED: To make a memory device low in cost, small in size and also high in access speed. SOLUTION: N pieces of time division read signals controlling memory data transmitting means 103, 104 having (n) groups are inputted to time division read signal input terminals OE1, OE2. Read sign...
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Main Author | |
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Format | Patent |
Language | English |
Published |
09.09.1997
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To make a memory device low in cost, small in size and also high in access speed. SOLUTION: N pieces of time division read signals controlling memory data transmitting means 103, 104 having (n) groups are inputted to time division read signal input terminals OE1, OE2. Read signals OE01, OE02 reading out data from RAM main bodies 101, 102 to internal data busses 111, 112 are generated by synthesizing the (n) pieces of time dividing read signals by a read signal synthesizing means 107 and moreover, (n) pieces of time division write signals controlling external data receiving means 105, 106 having (h) groups are inputted to time division write signal input terminals WE1, WE2. Write signals WE01, WE02 writing data from the internal data busses 111, 112 to the RAM main bodies 101, 102 are generated by synthesizing the (n) pieces of time division signals by a write signal synthesizing means. Then data are transmitted and received by making the internal data busses 111, 112 into N bits data busses and converting external data busses into the data busses having N/n bits and controlling the external data busses having N/n bits in time division. |
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Bibliography: | Application Number: JP19960045830 |