FIELD EFFECT TRANSISTOR AND MANUFACTURE OF THE SAME

• Main Author: UDA TOMOYA
• Format: Patent
• Language: English
• Published: 15.08.1997
• Edition: 6
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide FET having high breakdown strength between gate/drain and high mutual conductance and to provide a method for manufacturing FET with satisfactory reproducibility. SOLUTION: A gate electrode 13 constituted of WSi is formed on a GaAs substrate 11 where an n-layer 12 is formed by using dry etching. Then, n'-layers 16 are formed with ion implantation with the gate electrode as a mask. First through films 14 constituted of SiN are deposited. A mask 15 is formed in such a way that it covers only the drain-side area of the n-layer 12. The first through films 14 are etched by etching and the source-side area of the n-layer 12 is exposed. A second through film 17 constituted of SiO2 are deposited and n<+> layers 18 are formed by ion implantation with the first through films 14 and the second through films 17 as the masks. The first through films 14 and the second through films 17 are annealed as protection films and ion implanted layers are activated. Finally, source/drain electrodes 19 are formed.