PARALLEL/SERIAL CONVERSION CIRCUIT

PROBLEM TO BE SOLVED: To provide the parallel/serial conversion circuit from which data of a stable serial signal are outputted. SOLUTION: When parallel signal data are received by a data input terminal DATA, the data are latched and inverted by a leading of a latch clock signal received by a latch...

Full description

Saved in:
Bibliographic Details
Main Author ITO HISAHARU
Format Patent
LanguageEnglish
Published 11.07.1997
Edition6
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:PROBLEM TO BE SOLVED: To provide the parallel/serial conversion circuit from which data of a stable serial signal are outputted. SOLUTION: When parallel signal data are received by a data input terminal DATA, the data are latched and inverted by a leading of a latch clock signal received by a latch clock signal input terminal RCK. Then the data are counted based on a clock signal received by the clock input terminal CLK1 and when the count reaches a prescribed value, a ripple carry signal is outputted from a ripple carry signal output terminal RCY. A D flip-flop circuit 2 keeps an output of a serial signal received at a data input terminal D from a data output terminal OUT till the ripple carry signal is received by a reset terminal R.
Bibliography:Application Number: JP19950340656