STORAGE DEVICE

PROBLEM TO BE SOLVED: To reduce overhead and to improve operation speed. SOLUTION: A command detection circuit 4 interprets the 1st byte of a command received by a controller 2, and at the time of judging the 1st byte as a command for requesting writing, outputs a signal DET indicating writing opera...

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Bibliographic Details
Main Author DAIGO AKIHIKO
Format Patent
LanguageEnglish
Published 11.07.1997
Edition6
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PROBLEM TO BE SOLVED: To reduce overhead and to improve operation speed. SOLUTION: A command detection circuit 4 interprets the 1st byte of a command received by a controller 2, and at the time of judging the 1st byte as a command for requesting writing, outputs a signal DET indicating writing operation. A read/write control. circuit 5 outputs a control signal WE for setting up a memory 6 to a writing mode. At the time of receiving all commands, the controller 2 outputs an interruption signal INT. A CPU 3 executes interruption processing and command interpreting processing and writes data in the memory 6. Since switching to the writing mode is completed at the end of analysis of all the commands, the operation speed can be increased only by time corresponding to mode switching time.
Bibliography:Application Number: JP19950334707