TEST PATTERN CREATING DEVICE

PROBLEM TO BE SOLVED: To provide a universal test pattern creating device for efficiently creating the test pattern of an integrated circuit without any errors. SOLUTION: A keyword is registered in a keyword table 12 corresponding to a signal pattern by a keyword definition part 16 and a test patter...

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Bibliographic Details
Main Authors NISHIGAKI NAOHIKO, HASHIMOTO KEIKO
Format Patent
LanguageEnglish
Published 06.06.1997
Edition6
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:PROBLEM TO BE SOLVED: To provide a universal test pattern creating device for efficiently creating the test pattern of an integrated circuit without any errors. SOLUTION: A keyword is registered in a keyword table 12 corresponding to a signal pattern by a keyword definition part 16 and a test pattern expressed by the keyword and a signal value is inputted by a pattern input part 18. A keyword conversion part 14 replaces the keyword in the test pattern by the signal pattern as needed or replaces a specific signal pattern in the test pattern by the keyword. After that, a part which should not be edited in the test pattern is set as a lock region by a lock setting part 22, thus enabling a lock control part 24 to control editing processing so that the contents in the lock region cannot be changed when the test pattern is edited by an editing processing part 28 based on an editing command inputted by an editing input part 26.
Bibliography:Application Number: JP19950305763