MEMORY CONTROLLER

• Main Author: TOMITA SEIICHI
• Format: Patent
• Language: English
• Published: 12.04.1996
• Edition: 6
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; INFORMATION STORAGE; PHYSICS; STATIC STORES

PURPOSE: To provide a memory controller with an error detecting and correcting function using a flash memory. CONSTITUTION: Flash memories are used for a main storage part 10 and an error detection and correction code storage part 20, and a selecting circuit 60 is provided between an error detection and correction code generation part 30 and an error detection and correction code storage part 20 and selects write instruction data for data to the main storage part 10 and an error detection and correction code computed by the error detection and correction code generation part 30 and outputs them to the error detection and correction code storage part 20. Further, this controller is provided with a switching setting part 70 which inputs a read/write instruction(R/W) for data sent from the CPU and outputs a switching signal to the selecting circuit 60, and when a write instruction for data is sent from the CPU, the switching setting part 70 sends the switching signal to the selecting circuit 60 and sends instruction data sent from the CPU to the main storage part 10 to the error detection and correction code storage part 20. After this error detection and correction code storage part 20 is brought into write mode, the error detection and correction code computed by the error detection and correction code generation part 30 is written in the error detection and correction code storage part 20.