EXTERNAL CONNECTION-TEST CIRCUIT IN SEMICONDUCTOR INTEGRATED CIRCUIT

PURPOSE: To provide an external connection-test circuit in a semiconductor integrated circuit, which can miniaturize an MCM and which can realize a high speed of the MCM. CONSTITUTION: An impedance control means which is composed of an OR circuit 12, an AND circuit 13, a NAND circuit 14 and MOS tran...

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Bibliographic Details
Main Author UDA MANABU
Format Patent
LanguageEnglish
Published 02.04.1996
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
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Summary:PURPOSE: To provide an external connection-test circuit in a semiconductor integrated circuit, which can miniaturize an MCM and which can realize a high speed of the MCM. CONSTITUTION: An impedance control means which is composed of an OR circuit 12, an AND circuit 13, a NAND circuit 14 and MOS transistors TR3, TR4 sets input/output pads 81-8n for a semiconductor integrated circuit to a high-impedance state. A discharge means which is composed of a MOS transistor TR2 discharges an electric charge in capacitors 91-9n, for an object to be tested, which are connected to the input/output pads 81-8n. A charging means which is composed of a MOS transistor TR1 and of a resistance R1 charges the capacitances 91-9n with an electric charge. A measuring means which is composed of a control part 1 and of a voltage comparator 11 discharges the capacitances 91-9n by the discharge means, and it measures and outputs the time which elapses until the potential of the input/output pads 81-8n reaches a prescribed potential after the capacitances 91-9n have been charged by the charging means.
Bibliography:Application Number: JP19940223220