REDUNDANCY RELIEVING METHOD

PURPOSE:To obtain technology for making possible redundancy relieving with redundant constitution of less scale by improving redundancy efficiency. CONSTITUTION:Normal bit lines B4, B4*, B2 and B2* including defects are cut off, and divided into a defective region and a normal region, and they are r...

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Bibliographic Details
Main Authors NISHIYAMA MASAHIKO, USAMI MASAMI
Format Patent
LanguageEnglish
Published 12.01.1996
Edition6
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PURPOSE:To obtain technology for making possible redundancy relieving with redundant constitution of less scale by improving redundancy efficiency. CONSTITUTION:Normal bit lines B4, B4*, B2 and B2* including defects are cut off, and divided into a defective region and a normal region, and they are relieved by connecting cut end parts of the normal region to redundant bit lines J1', J1*', J1, J1*. Thereby, two normal bit lines can be relieved by a redundant bit line corresponding to length of one conventional redundant bit line, and relieving efficiency is improved.
Bibliography:Application Number: JP19940159172