MANUFACTURE OF SEMICONDUCTOR DEVICE WITH DRAM

PURPOSE: To provide a manufacturing method of a semiconductor device incorporating a DRAM which can reduce the step-difference between a memory cell region and a peripheral circuit region, and restrain the punch through of impurity ions to a part just under a gate electrode which is caused by obliqu...

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Bibliographic Details
Main Author UMEBAYASHI HIROSHI
Format Patent
LanguageEnglish
Published 21.06.1996
Edition6
Subjects
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Summary:PURPOSE: To provide a manufacturing method of a semiconductor device incorporating a DRAM which can reduce the step-difference between a memory cell region and a peripheral circuit region, and restrain the punch through of impurity ions to a part just under a gate electrode which is caused by oblique ion implantation for forming a pocket region, which ion implantation is performed in order to control the short channel effect of a P-channel transistor used in the peripheral circuit. CONSTITUTION: A storage node 28a formed in a memory cell region M for a DRAM and two conductor layers 28b, 30b constituting a plate electrode 30a are left on the whole surface of a peripheral circuit region S where a gate electrode and a contact hole are not formed. In the state that an insulating layer 8 is left on the gate electrode 6 formed in the peripheral circuit region S, ions are obliquely implanted in order to restrain the short channel effect of a P-channel transistor. In the state that the insulating layer 8 is left on the gate electrode 6b in the peripheral circuit region S, interlayer insulating layers 24, 30 are formed over the whole surfaces of the memory cell region for a DRAM and the peripheral circuit region.
Bibliography:Application Number: JP19940304884