HIGH SPEED MEMORY ACCESS SYSTEM
PURPOSE: To quickly transfer memory access information between a circuit requiring memory access and a memory module without increasing the number of interface signal lines in respect to a system for executing high speed memory access. CONSTITUTION: A circuit requiring memory access is provided with...
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| Main Author | |
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| Format | Patent |
| Language | English |
| Published |
17.05.1996
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| Edition | 6 |
| Subjects | |
| Online Access | Get full text |
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| Abstract | PURPOSE: To quickly transfer memory access information between a circuit requiring memory access and a memory module without increasing the number of interface signal lines in respect to a system for executing high speed memory access. CONSTITUTION: A circuit requiring memory access is provided with a 1st high speed information transferring circuit 3 for multiplexing and transferring memory access information inputted from respective logic parts, separating multiplexed response information inputted from respective memory blocks and transferring the separated information to the logic part of an access source and a memory module is provided with a 2nd high speed information transferring circuit 4 for separating the multiplexed access information inputted from the circuit 3, applying the separated information to respective memory blocks, multiplexing response information from respective memory blcoks, and transferring the multiplexed information to the circuit 3. |
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| AbstractList | PURPOSE: To quickly transfer memory access information between a circuit requiring memory access and a memory module without increasing the number of interface signal lines in respect to a system for executing high speed memory access. CONSTITUTION: A circuit requiring memory access is provided with a 1st high speed information transferring circuit 3 for multiplexing and transferring memory access information inputted from respective logic parts, separating multiplexed response information inputted from respective memory blocks and transferring the separated information to the logic part of an access source and a memory module is provided with a 2nd high speed information transferring circuit 4 for separating the multiplexed access information inputted from the circuit 3, applying the separated information to respective memory blocks, multiplexing response information from respective memory blcoks, and transferring the multiplexed information to the circuit 3. |
| Author | HAYAMI SHICHIRO |
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| Notes | Application Number: JP19940256611 |
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| PublicationDate | 19960517 |
| PublicationDateYYYYMMDD | 1996-05-17 |
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| PublicationDecade | 1990 |
| PublicationYear | 1996 |
| RelatedCompanies | FUJITSU LTD |
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| Snippet | PURPOSE: To quickly transfer memory access information between a circuit requiring memory access and a memory module without increasing the number of interface... |
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| SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| Title | HIGH SPEED MEMORY ACCESS SYSTEM |
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