SEMICONDUCTOR DEVICE WITH PAD FOR CIRCUIT INSPECTION

PURPOSE:To provide an inspection pad that occupies no space on an IC chip, and capable of eliminating a parasitic factor when the test pad is used for a high-frequency IC. CONSTITUTION:An inspection pad 181 is formed on a scribing line 191. The inspection pad 181 on the scribing line 191 has a shape...

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Bibliographic Details
Main Authors SAKAI HIROYUKI, MORIMOTO SHIGERU
Format Patent
LanguageEnglish
Published 07.02.1995
Edition6
Subjects
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Summary:PURPOSE:To provide an inspection pad that occupies no space on an IC chip, and capable of eliminating a parasitic factor when the test pad is used for a high-frequency IC. CONSTITUTION:An inspection pad 181 is formed on a scribing line 191. The inspection pad 181 on the scribing line 191 has a shape like a lozenge. The inspection pad 181 on the scribing line 191 is removed when an IC is cut off in a scribing step. When this technique is applied to a high-frequency IC, a parasitic factor caused by the inspection pad 181 can be eliminated. Since the inspection pad 181 occupies no space on the IC, high integration can be realized.
Bibliography:Application Number: JP19930179007