SEMICONDUCTOR MEMORY DEVICE ENABLING HIGH BANDWIDTH
PURPOSE: To obtain a semiconductor memory device composed of chip architectures, in which high band width is acquired easily. CONSTITUTION: Word lines are wired in the array longitudinal direction of a rectangular memory cell array while bit lines re wired in the orthogonal direction, and data input...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
08.12.1995
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Summary: | PURPOSE: To obtain a semiconductor memory device composed of chip architectures, in which high band width is acquired easily. CONSTITUTION: Word lines are wired in the array longitudinal direction of a rectangular memory cell array while bit lines re wired in the orthogonal direction, and data input/output lines (IO/bar IO) and column selection lines(CSL) for connecting and selecting the data input/output lines and the bit lines are wired in the above-mentioned orthogonal direction. The data input/output lines are connected to main data input/output lines (MIO/bar MIO) through a mutliplexer 20 at every fixed number. Since the basic configuration of the data input/output lines and the column selection lines can be wired repeatedly on the array, integrity is improved, and high band width can be realized easily. In an access, a unit array 12 is activated in the word-line direction wired in the longitudinal direction, and as many data as the number of main-data input/ output lines can be accessed to the unit array 12 of each subarray 22. |
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Bibliography: | Application Number: JP19950119433 |