OVERVOLTAGE SUPPRESSING CIRCUIT

• Main Authors: HIJIKATA SADAHITO, OBATA ATSUMI
• Format: Patent
• Language: English
• Published: 28.07.1995
• Edition: 6
• Subjects: CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTINGELECTRIC POWER; CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TOTRANSPORTATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER; ELECTRIC EQUIPMENT OR PROPULSION OF ELECTRICALLY-PROPELLEDVEHICLES; ELECTRICITY; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES, IN GENERAL; EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERATION; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; PERFORMING OPERATIONS; SYSTEMS FOR STORING ELECTRIC ENERGY; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS; TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE; TRANSPORTING; VEHICLES IN GENERAL

PURPOSE:To suppress an abnormal high voltage being produced when the load of an inverter circuit disappears immediately after the operation of a current interrupter for disconnecting a secondary battery automatically upon detection of an abnormal current. CONSTITUTION:The high voltage suppressing circuit comprises a squirrel-cage induction machine 2 coupled with the rotary shaft of an internal-combustion engine 1, a secondary battery circuit 3, an inverter circuit 4 tar coupling the AC polyphase circuit of the induction machine 2 and the DC circuit of the secondary battery circuit 3 while converting the electric energy bilaterally, and a control circuit 5 for the inverter circuit 4. A current circuit breaker 21 is inserted into a path connecting the secondary battery circuit 3 and the inverter circuit 4. A detecting circuit 13 detects the interrupted state of the current interrupter 21 ad delivers a signal to the control circuit 5 which controls a semiconductor switch element in the inverter circuit 4 to bring into interrupted state based on an output from a detecting circuit 13.