SELECTION SYSTEM FOR INPUT/OUTPUT DEVICE

• Main Author: TOKUNAGA KEI
• Format: Patent
• Language: English
• Published: 21.04.1995
• Edition: 6
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

PURPOSE:To disable the input/output device dedicated to a system to be allowed for being selected and to exclude a performance decrease due to the overhead for accessing the input/output device dedicated to a system. CONSTITUTION:This selection system is equipped with a decoder 1 which detects coincidence between the number and the address assigned to an input/output device corresponding to a specific processor, a decoder 2 which detects whether or not an address signal is within a specific range, a fetch detecting circuit 3 which detects the fetch of an instruction, a D flip-flop 4 which temporarily stores the signal 109 outputted from the decoder 2 by using a pulse signal 111 as a clock, an AND circuit 5 which selects an output device and outputs an output acknowledgement signal 106 and an AND circuit 6 which outputs an input acknowledgement signal 105, a D flip-flop 7 which holds data on a data bus 107 through the output acknowledgement signal 106 and outputs a signal 108, and a three-state buffer 8 which outputs the signal 108 onto the data bus 107 through the input acknowledgement signal 105.